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The use of this design is governed by, and subject to, the terms and conditions of the Altera License Terms and Conditions for 10-Gbps Ethernet (10GbE) Reference Design.
Starting from Quartus® II software version 10.0 (released July 2010), this Reference Design is not recommended for new designs and will not be offered or licensed to new 10GbE customers. For new 10GbE designs, please use the following new MegaCore® functions from Altera: 10-Gbps Ethernet MAC MegaCore Function, XAUI PHY MegaCore Function, and 10GBASE-R PHY MegaCore Function. For further questions, please contact your local Altera® sales representative.
Feature Rich
- Complete 10GbE intellectual property (IP) with all the necessary IP modules
- 10-Gb media access controller (MAC), XAUI physical coding sub-layer (PCS), and XAUI physical media attachment (PMA)
- Flexible IP options at synthesis for size and application optimization
- MAC only, MAC + hard embedded or soft PCS + PMA, and soft PCS + PMA
- Parameterizable FIFO (64 bytes to 64 KB) and non-FIFO options for low latency
- Standard-based statistics counters supporting SNMP Management Information Base (MIB and MIB-II) and remote network monitoring (RMON)
- Management Data Input/Output (MDIO)
- Error correction coding (ECC) option for internal memory in IP
- Seamless external interface to external Ethernet PHY device
- XAUI (4 bits at 3.125 Gbps) or XGMII (32 bits at 312.5 Mbps)
- MDIO master interface for external PHY device management
- High-performance internal system interfaces
- Altera Avalon®-Streaming (Avalon-ST) 64-bit interface for data transfer
- Altera Avalon Memory-Mapped Interface (Avalon-MM) 32-bit slave interface for management
Ease of Use
- Complete 10GbE protocol solution available to start your design quickly
- Development boards and hardware reference designs
- IP functional simulation models for use in VHDL and Verilog HDL simulators
- Verification test bench and example design
- Easy IP configuration and generation using Altera MegaWizardTM Plug-in Manager GUI software
- Easy system integration with Altera SOPC Builder software
- Quick and easy licensing for your evaluation
Robust Solution
- IEEE802.3ae-2005 Ethernet standard compliant
- Passed the University of New Hampshire Interoperability Lab (UNH) 10GbE tests of MAC, PCS, and PMA
- Extensively verified in simulation and tested in hardware with third-party test equipment
Description
As the leading provider of 10GbE in 40-nm FPGAs, Altera offers a 10GbE reference design for designers to easily build systems with a very high throughput rate Ethernet connection. Our 10GbE reference design consists of a 10-Gb MAC and, optionally, a 10GBASE-X PCS and PMA. This IP function enables an Altera device to interface to an external 10GbE PHY device, which, in turn, interfaces to the 10GbE network.
This reference design provides an XGMII or XAUI external interface to easily connect the system logic to a variety of standard 10GbE PHY devices and optical transceiver modules. You can implement the 10GBASE-X XAUI PCS option and XAUI interface in hard silicon in Altera FPGAs with gigabit serial transceivers. Stratix® IV GT FPGAs are the first and only FPGAs that support 10GbE with 10-Gbps serial transceivers to interface directly to 10-Gbps XFI modules or through electronic dispersion compensation (EDC) chips to SFP+ modules depending on channel quality. Figures 1 and 2 illustrate examples of Altera 10GbE reference designs with possible configurations in different Altera devices with XAUI, XGMII, and 10.3-Gbps XFI interfaces, respectively.
Figure 1. 10GbE Reference Design in an Altera FPGA with XAUI or XGMII Interface
Figure 2. 10GbE Reference Design in Altera Stratix IV GT FPGA with 10-Gbps Serial Transceivers
Protocol Solution
- Detailed documentation on how to use the reference design
- Step-by-step instructions to get started
- Complete description of Altera device capabilities
- Free online training: 10-Gbit Ethernet Design with Altera 40 nm Devices
- Example design for quick and easy design start in 10-Gbps Ethernet Reference Design User Guide (PDF)
- For latest UNH test reports contact your local Altera sales representative
- For other 10-Gb solutions see Altera Wireline Solutions
Performance
Typical expected performance and utilization figures for this core are provided in the 10-Gbps Ethernet IP Datasheet.
Technical Support
For technical support on this reference design, please visit the 10-Gbps Ethernet Reference Design Support Center. Additional support is available in the Altera mySupport online issue tracking system. You may also search for related topics on this function in the Altera Solutions Database.
Reference Designs Disclaimer
These reference design illustrations may be used within Altera devices only and remain the copyrighted property of Altera Corporation.
